1. Field of the Invention
This invention relates to semiconductor devices generally, and in particular to one having a semiconductor body including at least a bipolar high voltage semiconductor circuit element, said bipolar circuit element having an island-shaped first region of a first conductivity type adjoining a substantially flat surface, said first region forming with an underlying second region of the second conductivity type a first pn-junction extending substantially parallel to the surface, the first region being laterally bounded at least partly by a second pn-junction with an associated depletion zone which is formed between the first region and a third region of the second conductivity type extending between the second region and the surface, said second pn-junction having a lower breakdown voltage than the first pn-junction, a contact region adjoining the surface and the first region.
This invention further relates to a semiconductor device with a semiconductor body having a substantially flat surface including at least one field effect transistor having a source electrode and a drain electrode, a channel region between said source and drain electrodes and a gate electrode adjoining the channel region to influence, by means of a gate voltage applied to the gate electrode, a depletion zone for controlling a flow of charge carriers between the source and drain electrodes, the field effect transistor comprising a layer-shaped first region of a first conductivity type which, with an underlying second region of the second conductivity type, forms a first pn junction extending substantially parallel to the surface, whereby, at least in the operating condition, an island-shaped portion of the first region is bounded laterally at least partly, by a second pn junction with an associated depletion zone which is formed between the first region and a third region of the second conductivity type which adjoins the first region, said second pn junction having a lower breakdown voltage than the first pn junction, at least the gate electrode adjoining the island-shaped region portion.
2. Description of the Prior Art
A semiconductor device including a bipolar high voltage semiconductor element as described above is disclosed in British Pat. No. 1,098,760.
In planar bipolar semiconductor circuit elements of the conventional type a pn-junction is formed by an island-shaped part (the first region) of a layer situated on a substrate (the second region) of the opposite type. Said first region may be, for instance, the base zone of a bipolar transistor. The pn junction between the island and the substrate extending parallel to the surface constitutes the above-mentioned first pn junction, while the second pn junction is formed between the island and, for instance, a diffused insulation zone of the opposite conductivity type bounding the island laterally.
In many cases, the breakdown voltage which can be achieved in these devices between the first and the second region is insufficient. This is because long before the breakdown voltage of the first pn junction to be expected theoretically on the basis of the doping profile is reached, breakdown already occurs at the surface at the second pn junction as a result of the unfavorable field distribution prevailing there due to the high doping concentration and doping gradients as well as due to the presence of surface states, or curvature near the pn-junction edge.
Attempts have been made to improve this by etching grooves in the semiconductor surface which extend downwards into the second region and replace the diffused insulation zones. As a result of this the described edge effects are avoided at least partly, since the remaining pn junction now extends entirely parallel to the surface and terminates in the groove.
However, this method has two important disadvantages. Firstly, the surface is no longer flat so that upon providing the metallization, problems occur with the grooves and the possibility of fracture in the metallization pattern arises. Secondly, the angle at which the pn junction (normally formed between a higher doped and a lower doped region) intersects the wall of the groove is generally unfavorable (acute angle in the more highly doped region).
In order to mitigate this, the wall of the groove is usually passivated with a glass layer in which (usually negative) electric charges have been provided. As a result of this, the unfavorable field distribution at the surface can be corrected. At higher temperatures which may sometimes occur in the operating condition in high-voltage transistors, said types of glass, however, may lose their electric charge and become inoperative.
In the above-mentioned British Patent 1,098,760 there is described a bipolar transistor in which a higher doped zone adjoining the emitter zone is provided in the base region, the depletion layer of the collector-base junction extending in a direction transverse to the surface up to said highly doped zone.
One of the objects of the invention is to provide a semiconductor device having a bipolar high-voltage semiconductor circuit element, for instance a transistor, in which the breakdown voltage of the collector-base junction is practically not reduced by the field distribution at the surface and in which the semiconductor surface can remain entirely flat.
Another object of the invention is to provide a semiconductor device having a bipolar high voltage semiconductor circuit element in which complicated passivating means need not be used.
Still a further object of the invention is to provide a bipolar high-voltage transistor which is insulated from the substrate and has a very high collector-base breakdown voltage, for use in monolithic integrated circuits.
A semiconductor device of the kind described having a field effect transistor is known, for example, from U.S. Pat. No. 3,586,931.
Influencing a depletion zone for controlling the flow of charge carriers is to be understood to mean in this Application either the narrowing or widening, by means of variation of the thickness of a depletion zone, of a current channel bounded by said depletion zone, or the variation, by means of variation of the potential distribution in a depletion zone, of a flow of charge carriers moving through said depletion zone.
The field effect transistor may have various structures in accordance with the form of the source, drain and gate electrodes. For example, these electrodes may have the form of metal layers which form on the semiconductor surface ohmic source and drain contacts, and one or more rectifying gate electrodes with Schottky contacts. Alternatively, the source, drain and gate electrodes may be formed by metal layers adjoining semiconductor electrode zones which form, with the adjoining part of the semiconductor, pn junctions (in the case of gate electrodes) or non-rectifying junctions (for the source and drain electrodes). Furthermore, the gate electrodes may have the form of a conductive layer which is separated from the semiconductor surface by an insulating layer and with which the said depletion zone is formed in the channel region as, for example, in a so-called "deep depletion" field effect transistor. Consequently, when in this Application there is referred to source, drain and gate electrodes, this includes the electrode zones and insulating layers, respectively, possibly associated with said electrodes.
In the known field effect transistors of the kind described, in general no high voltages can be applied across the first and second pn junctions. This is due inter alia to the fact that, long before the breakdown voltage of the first pn junction to be expected theoretically on the basis of the doping profile is reached, breakdown already occurs at the second pn junction as a result of the unfavorable field distribution prevailing there. Said breakdown usually occurs at or in the immediate proximity of the surface. The unfavorable field distribution may be caused by a high doping concentration of the third region and/or by a high doping gradient near the second pn junction, but also, for instance, by a high local curvature of the second pn junction.
In order to increase the admissible voltage, the doping concentration of the first region may be reduced and also, in order to make space for the depletion zone thereby further extending in the first region, the thickness thereof may be increased. However, since the channel conductivity is proportional to the thickness, but the pinch-off voltage is proportional to the square of the thickness of the channel region, said measure will have for its result that, with the length and width of the channel remaining the same and with the pinch-off voltage remaining the same, the channel conductivity is reduced. In fact, for the pinch-off voltage V.sub.p it is found that ##EQU1## and for the channel conductivity it is found that ##EQU2## where a is the thickness of the channel region pinched-off by the gate electrode, N is the doping concentration of the channel region, W is the width and L is the length of the channel region, .mu. is the mobility of the charge carriers, q is the electron charge and .epsilon. is the dielectric contact of the semiconductor material. When N is reduced to a value N'=(N/.beta.)(.beta.&gt;1), then it is found (for the pinch-off voltage V.sub.p remaining the same) that: ##EQU3##
Generally, however, such a reduction of the channel conductivity is very detrimental for the good operation of the field effect transistor.
One of the objects of the invention is to provide a semiconductor device with a flat surface including a field effect transistor of a new structure, which device may be used at very much higher voltages than known field effect transistors of the kind described, without reducing the channel conductivity.
The invention is based inter alia on the recognition of the fact that, in contrast with what could be expected, this can be achieved by not increasing the thickness of the first region but by decreasing it.